Towards a Deterministic Fine-Grained Task Ordering Using Multi-Versioned Memory

Eran Gilad, Tehila Mayzels, Elazar Raab, Mark Oskin, Yoav Etsion

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Task-based programming models aim to simplify parallel programming. A runtime system schedules tasks to execute on cores. An essential component of this runtime is to track and manage dependencies between tasks. A typical approach is to rely on programmers to annotate tasks and data structures, essentially manually specifying the input and output of each task. As such, dependencies are associated with named program objects, making this approach problematic for pointer-based data structures. Furthermore, because the runtime system must track these dependencies, for efficient runtime performance the read and write sets should be kept small. We presume a memory system with architecturally visible support for multiple versions of data stored at the same program address. This paper proposes and evaluates a task-based execution model that uses this versioned memory system to deterministically parallelize sequential code. We have built a task-based runtime layer that uses this type of memory system for dependence tracking. We demonstrate the advantages of the proposed model by parallelizing pointer-heavy code, obtaining speedup of up to 19x on a 32-core system.

Original languageEnglish
Title of host publicationProceedings - 29th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2017
Pages105-112
Number of pages8
ISBN (Electronic)9781509012336
DOIs
StatePublished - 8 Nov 2017
Event29th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2017 - Campinas, Brazil
Duration: 17 Oct 201720 Oct 2017

Publication series

NameProceedings - 29th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2017

Conference

Conference29th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2017
Country/TerritoryBrazil
CityCampinas
Period17/10/1720/10/17

Keywords

  • Parallel programming
  • Task-based programming
  • Versioned memory

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

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