Reduction of voltage drop and ripple in voltage multipliers

Se Hyun Park, Liran Katzir, Doron Shmilovitz

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this paper we present a novel topology for high voltage generation based on the widely used Half-Wave Cockcroft-Walton voltage multiplier. The proposed topology consists of several voltage multiplying sections fed separately at their inputs and whose output voltages are summated across the load. Using the proposed topology we can attain over m times higher voltage gain compared to the regular Half-Wave Cockcroft Walton voltage multiplier (m being the splitting level), while significantly reducing the output ripple. The theory is supported by simulations and experiments.

Original languageEnglish
Title of host publication2015 17th European Conference on Power Electronics and Applications, EPE-ECCE Europe 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9789075815221
DOIs
StatePublished - 27 Oct 2015
Event17th European Conference on Power Electronics and Applications, EPE-ECCE Europe 2015 - Geneva, Switzerland
Duration: 8 Sep 201510 Sep 2015

Publication series

Name2015 17th European Conference on Power Electronics and Applications, EPE-ECCE Europe 2015

Conference

Conference17th European Conference on Power Electronics and Applications, EPE-ECCE Europe 2015
Country/TerritorySwitzerland
CityGeneva
Period8/09/1510/09/15

Keywords

  • High voltage power converters
  • output impedance
  • reduced voltage drop

All Science Journal Classification (ASJC) codes

  • Fuel Technology
  • Electrical and Electronic Engineering
  • Energy Engineering and Power Technology

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