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Realization of Memristor Ratioed Logic with HfO2-Based Resistive RAM

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Emerging nonvolatile memristive memory technologies, such as resistive RAM, offer the potential to perform logic gate operations. One prominent technique is Memristor Ratioed Logic (MRL), which belongs to the non-stateful CMOS counterpart logic group. MRL can execute AND and OR functions using two memristors as voltage dividers. Since both input and output instances are represented as voltages, MRL gates can be seamlessly integrated with CMOS logic, allowing for the construction of complete logic circuits using CMOS inverters. This paper experimentally demonstrates MRL gates based on Hf02 memristors within a crossbar array. We validate the functionality of these gates and identify their limitations, including the nonlinearity, the lack of signal restoration, and certain reliability issues. Additionally, we introduce a memristor initialization mechanism that simplifies the switching process, enhancing the overall performance and reliability of MRL gates.

Original languageEnglish GB
Title of host publication2024 31st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2024
ISBN (Electronic)9798350377200
DOIs
StatePublished - 2024
Event31st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2024 - Nancy, France
Duration: 18 Nov 202420 Nov 2024

Publication series

NameProceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Conference

Conference31st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2024
Country/TerritoryFrance
CityNancy
Period18/11/2420/11/24

Keywords

  • memristor
  • memristor-ratioed logic (MRL)
  • non-statefullogic
  • reliability
  • valence change memory (VCM)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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