@inproceedings{7f986bde985941c1b0bf1d8998b3db7e,
title = "Performance Prediction of Large-Scale 1S1R Resistive Memory Array Using Machine Learning",
abstract = "A methodology to analyze device-to-circuit characteristics and predict memory array performance is presented. With a five- parameter characterization of the selection device and a compact model of RRAM, we are able to capture the behaviors of reported selection devices and simulate 1S1R cell/array performance with RRAM compact modeling using HSPICE. To predict the performance of the memory array for a variety of selectors, machine-learning algorithms are employed, using device characteristics and circuit simulation results as the training data. The influence of selector parameters on the 1S1R cell and array behavior is investigated and projected to large Gbit arrays. The machine learning methods enable time-efficient and accurate estimates of 1S1R array performance to guide large-scale memory design.",
keywords = "1S1R, RRAM, crossbar array, machine learning, prediction, selector",
author = "Zizhen Jiang and Peng Huang and Liang Zhao and Shahar Kvatinsky and Shimeng Yu and Xiaoyan Liu and Jinfeng Kang and Yoshio Nishi and Wong, {H. S.Philip}",
note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 2015 7th IEEE International Memory Workshop, IMW 2015 ; Conference date: 17-05-2015 Through 20-05-2015",
year = "2015",
month = jul,
day = "2",
doi = "10.1109/IMW.2015.7150302",
language = "الإنجليزيّة",
series = "2015 IEEE 7th International Memory Workshop, IMW 2015",
booktitle = "2015 IEEE 7th International Memory Workshop, IMW 2015",
}