Performance coding: Codes for fast write and read in multi-level NVMs

Multi-level memory cells are used in non-volatile memories to increase the storage density. Using multi-level cells, however, imposes lower read and write speeds, limiting their usability with high-performing applications. In this work we study the tradeoff between storage density and write/read speeds using codes. The contributions are codes that give high-performance write and read processes with minimal reduction in storage density. We describe the codes, give a detailed analytical treatment of their information rate and speed, provide encoding/decoding algorithms, and compare them with more basic access schemes and upper bounds. Using performance coding enables accessing the memory with variable access speeds, thus creating heterogenous storage devices serving a variety of applications with improved efficiency.