Abstract
Processing-in-memory (PIM) seeks to eliminate computation/memory data transfer using devices that support both storage and logic. Stateful logic techniques such as IMPLY, MAGIC and FELIX can perform logic gates within memristive crossbar arrays with massive parallelism. Multiplication via stateful logic is an active field of research due to the wide implications. Recently, RIME has become the state-of-the-art algorithm for stateful single-row multiplication by using memristive partitions, reducing the latency of the previous state-of-the-art by 5.1×. In this brief, we begin by proposing novel partition-based computation techniques for broadcasting and shifting data. Then, we design an in-memory multiplication algorithm based on the carry-save add-shift (CSAS) technique. Finally, we develop a novel stateful full-adder that significantly improves the state-of-the-art (FELIX) design. These contributions constitute MultPIM, a multiplier that reduces state-of-the-art time complexity from quadratic to linear-log. For 32-bit numbers, MultPIM improves latency by an additional 4.2× over RIME, while even slightly reducing area overhead. Furthermore, we optimize MultPIM for full-precision matrix-vector multiplication and improve latency by 25.5× over FloatPIM matrix-vector multiplication.
Original language | English |
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Pages (from-to) | 1647-1651 |
Number of pages | 5 |
Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
Volume | 69 |
Issue number | 3 |
DOIs | |
State | Published - 1 Mar 2022 |
Keywords
- Adders
- Clocks
- Logic gates
- Memristors
- Partitioning algorithms
- Processing-in-memory
- Resistance
- Transistors
- iterative algorithms.
- memristor
- multiplying circuits
- parallel algorithms
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering