Modulo Sampling with 1-Bit Side Information: Performance Guarantees in the Presence of Quantization

Neil Irwin Bernardo, Shaik Basheeruddin Shah, Yonina C. Eldar

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this work, we investigate the relationship between the dynamic range and quantization noise power in modulo analog-to-digital converters (ADCs). An algorithm to recover the original signal from quantized modulo observations with 1-bit side information is analyzed. We prove that an oversampling factor of OF > 3 and a quantizer resolution of b > 3 are sufficient for the modulo ADC to have better quantization noise suppression than a standard ADC without the modulo operator. Under this setting, the mean squared error (MSE) of a modulo ADC is O(1/OF3) whereas that of a standard ADC is only O(1/OF). Numerical results are presented to validate the derived performance guarantees.

Original languageEnglish
Title of host publication2024 IEEE International Symposium on Information Theory, ISIT 2024 - Proceedings
Pages3498-3503
Number of pages6
ISBN (Electronic)9798350382846
DOIs
StatePublished - 2024
Event2024 IEEE International Symposium on Information Theory, ISIT 2024 - Athens, Greece
Duration: 7 Jul 202412 Jul 2024

Publication series

NameIEEE International Symposium on Information Theory - Proceedings

Conference

Conference2024 IEEE International Symposium on Information Theory, ISIT 2024
Country/TerritoryGreece
CityAthens
Period7/07/2412/07/24

All Science Journal Classification (ASJC) codes

  • Theoretical Computer Science
  • Information Systems
  • Modelling and Simulation
  • Applied Mathematics

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