@inproceedings{78a595117a6d42d6bcfbdecab010c22c,
title = "Modular Processor Architecture with Cryptography ISA Extensions",
abstract = "A modular and extensible processor architecture can increase processing capability by extending the base Instruction Set Architecture (ISA) with custom instructions, adding more hardware modules, and enlarging data bus width and instruction interfaces. This architecture enables data and instruction level parallelism, yielding execution speedup. This paper proposes a base and tiny Reduced Instruction Set Computer (RISC) processor extended with powerful augmentations towards a broad symmetric cryptography applicability. The contribution of this paper is in the development of new low-cost ISA instructions targeting a wide range of cryptographic operations. We present a quantitative execution time analysis of various LightWeight Cryptography (LWC) algorithms on extended processors and propose novel low-to-medium cost architectural extensions categorized into several types. The proposed processor architecture is ideally suited for embedded applications with demanding performance, size, and power requirements.",
keywords = "Application specific, Configurable, Extensible, Lightweight Cryptography, Modular Processor Architecture",
author = "Oren Ganon and Itamar Levi",
note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 21st IEEE Interregional NEWCAS Conference, NEWCAS 2023 ; Conference date: 26-06-2023 Through 28-06-2023",
year = "2023",
doi = "https://doi.org/10.1109/newcas57931.2023.10198046",
language = "الإنجليزيّة",
series = "21st IEEE Interregional NEWCAS Conference, NEWCAS 2023 - Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "21st IEEE Interregional NEWCAS Conference, NEWCAS 2023 - Proceedings",
address = "الولايات المتّحدة",
}