Memristive multistate pipeline register

Shahar Kvatinsky; Yuval H. Nacson; Yoav Etsion; Avinoam Kolodny; Uri C. Weiser; Ravi Patel; Eby G. Friedman

doi:https://doi.org/10.1109/CNNA.2014.6888594

Memristive multistate pipeline register

Shahar Kvatinsky, Yuval H. Nacson, Yoav Etsion, Avinoam Kolodny, Uri C. Weiser, Ravi Patel, Eby G. Friedman

Technion - Israel Institute of Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Over the past years, new memory technologies such as RRAM, STT-MRAM, and PCM have emerged. These technologies employ devices located within the metal layers of the integrated circuit, which are relatively fast, dense, and power efficient and can be considered as 'memristors.' In this paper, we present these emerging memory technologies as enablers to the era of memory-intensive computing, which brings interesting opportunities for novel architectural applications. As an example, we present the multistate pipeline register (MPR), a structure that stores the microarchitectural state of multiple threads. We show that an MPR can eliminate the need to flush the pipeline upon a thread switch in Switch-on-Event (SoE) multi-threading machines. We call the new microarchitectural scheme, Continuous Flow Multi-Threading (CFMT), and compare the performance and power consumption against traditional SoE machines. Memristor-based CFMT exhibits an average performance improvement of 32% while reducing power consumption by 8.5%, thereby significantly increasing the performance to energy ratio.

Original language	English
Title of host publication	International Workshop on Cellular Nanoscale Networks and their Applications
Editors	Michael Niemier, Wolfgang Porod
ISBN (Electronic)	9781479964680
DOIs	https://doi.org/10.1109/CNNA.2014.6888594
State	Published - 29 Aug 2014
Event	2014 14th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2014 - Notre Dame, United States Duration: 29 Jul 2014 → 31 Jul 2014

Publication series

Name	International Workshop on Cellular Nanoscale Networks and their Applications

Conference

Conference	2014 14th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2014
Country/Territory	United States
City	Notre Dame
Period	29/07/14 → 31/07/14

Keywords

CFMT
Memristor
PCM
RRAM
STT-MRAM
memristive device
multistate register
multithreading

All Science Journal Classification (ASJC) codes

Computer Networks and Communications
Electrical and Electronic Engineering

Access to Document

https://doi.org/10.1109/CNNA.2014.6888594

Cite this

Kvatinsky, S., Nacson, Y. H., Etsion, Y., Kolodny, A., Weiser, U. C., Patel, R., & Friedman, E. G. (2014). Memristive multistate pipeline register. In M. Niemier, & W. Porod (Eds.), International Workshop on Cellular Nanoscale Networks and their Applications Article 6888594 (International Workshop on Cellular Nanoscale Networks and their Applications). https://doi.org/10.1109/CNNA.2014.6888594

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title = "Memristive multistate pipeline register",

abstract = "Over the past years, new memory technologies such as RRAM, STT-MRAM, and PCM have emerged. These technologies employ devices located within the metal layers of the integrated circuit, which are relatively fast, dense, and power efficient and can be considered as 'memristors.' In this paper, we present these emerging memory technologies as enablers to the era of memory-intensive computing, which brings interesting opportunities for novel architectural applications. As an example, we present the multistate pipeline register (MPR), a structure that stores the microarchitectural state of multiple threads. We show that an MPR can eliminate the need to flush the pipeline upon a thread switch in Switch-on-Event (SoE) multi-threading machines. We call the new microarchitectural scheme, Continuous Flow Multi-Threading (CFMT), and compare the performance and power consumption against traditional SoE machines. Memristor-based CFMT exhibits an average performance improvement of 32% while reducing power consumption by 8.5%, thereby significantly increasing the performance to energy ratio.",

keywords = "CFMT, Memristor, PCM, RRAM, STT-MRAM, memristive device, multistate register, multithreading",

author = "Shahar Kvatinsky and Nacson, {Yuval H.} and Yoav Etsion and Avinoam Kolodny and Weiser, {Uri C.} and Ravi Patel and Friedman, {Eby G.}",

note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 2014 14th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2014 ; Conference date: 29-07-2014 Through 31-07-2014",

year = "2014",

month = aug,

day = "29",

doi = "https://doi.org/10.1109/CNNA.2014.6888594",

language = "الإنجليزيّة",

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Kvatinsky, S, Nacson, YH, Etsion, Y, Kolodny, A, Weiser, UC, Patel, R & Friedman, EG 2014, Memristive multistate pipeline register. in M Niemier & W Porod (eds), International Workshop on Cellular Nanoscale Networks and their Applications., 6888594, International Workshop on Cellular Nanoscale Networks and their Applications, 2014 14th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2014, Notre Dame, United States, 29/07/14. https://doi.org/10.1109/CNNA.2014.6888594

Memristive multistate pipeline register. / Kvatinsky, Shahar; Nacson, Yuval H.; Etsion, Yoav et al.
International Workshop on Cellular Nanoscale Networks and their Applications. ed. / Michael Niemier; Wolfgang Porod. 2014. 6888594 (International Workshop on Cellular Nanoscale Networks and their Applications).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Kvatinsky, Shahar

AU - Nacson, Yuval H.

AU - Etsion, Yoav

AU - Kolodny, Avinoam

AU - Weiser, Uri C.

AU - Patel, Ravi

AU - Friedman, Eby G.

PY - 2014/8/29

Y1 - 2014/8/29

N2 - Over the past years, new memory technologies such as RRAM, STT-MRAM, and PCM have emerged. These technologies employ devices located within the metal layers of the integrated circuit, which are relatively fast, dense, and power efficient and can be considered as 'memristors.' In this paper, we present these emerging memory technologies as enablers to the era of memory-intensive computing, which brings interesting opportunities for novel architectural applications. As an example, we present the multistate pipeline register (MPR), a structure that stores the microarchitectural state of multiple threads. We show that an MPR can eliminate the need to flush the pipeline upon a thread switch in Switch-on-Event (SoE) multi-threading machines. We call the new microarchitectural scheme, Continuous Flow Multi-Threading (CFMT), and compare the performance and power consumption against traditional SoE machines. Memristor-based CFMT exhibits an average performance improvement of 32% while reducing power consumption by 8.5%, thereby significantly increasing the performance to energy ratio.

AB - Over the past years, new memory technologies such as RRAM, STT-MRAM, and PCM have emerged. These technologies employ devices located within the metal layers of the integrated circuit, which are relatively fast, dense, and power efficient and can be considered as 'memristors.' In this paper, we present these emerging memory technologies as enablers to the era of memory-intensive computing, which brings interesting opportunities for novel architectural applications. As an example, we present the multistate pipeline register (MPR), a structure that stores the microarchitectural state of multiple threads. We show that an MPR can eliminate the need to flush the pipeline upon a thread switch in Switch-on-Event (SoE) multi-threading machines. We call the new microarchitectural scheme, Continuous Flow Multi-Threading (CFMT), and compare the performance and power consumption against traditional SoE machines. Memristor-based CFMT exhibits an average performance improvement of 32% while reducing power consumption by 8.5%, thereby significantly increasing the performance to energy ratio.

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M3 - منشور من مؤتمر

T3 - International Workshop on Cellular Nanoscale Networks and their Applications

BT - International Workshop on Cellular Nanoscale Networks and their Applications

A2 - Niemier, Michael

A2 - Porod, Wolfgang

T2 - 2014 14th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2014

Y2 - 29 July 2014 through 31 July 2014

ER -

Memristive multistate pipeline register

Abstract

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Keywords

All Science Journal Classification (ASJC) codes

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