Memory Reliability for Cells with Strong Bit-Coupling Interference

Emerging memory technologies are offering unprecedented storage densities, alongside significant new reliability issues. One such issue this paper addresses is inter-cell interference between coupled pairs of cells. In the studied model there is strong interference between cells, in the sense that programming one cell to a high level changes the level of a second cell significantly. The particular type of interference we study is pair-wise coupling interference: where interference happens between disjoint pairs of cells, so every cell is affected by exactly one other cell.

Our results show that strong coupling interference can be effectively mitigated without need to add large amounts of redundancy beyond the simple Hamming codes common in low-latency memories. One of our techniques is using a soft decoder that can correct many more error combinations thanks to its knowledge of the interference model and parameters. Another technique introduces controlled intentional coupling between the cells at the write path, such that the undesired coupling can be neutralized at the read path with a clever choice of read levels. Overall the two schemes show promising reliability results compared to using the accepted read/write and decoding schemes. The schemes are applicable to a very general class of memories, and thus can help in the deployment of extremely dense emerging storage-class memory technologies that suffer from poor isolation between cells.