TY - GEN
T1 - Making Memristive Processing-in-Memory Reliable
AU - Leitersdorf, Orian
AU - Ronen, Ronny
AU - Kvatinsky, Shahar
N1 - Publisher Copyright: © 2021 IEEE.
PY - 2021
Y1 - 2021
N2 - Processing-in-memory (PIM) solutions vastly accelerate systems by reducing data transfer between computation and memory. Memristors possess a unique property that enables storage and logic within the same device, which is exploited in the memristive Memory Processing Unit (mMPU). The mMPU expands fundamental stateful logic techniques, such as IM-PLY, MAGIC and FELIX, to high-throughput parallel logic and arithmetic operations within the memory. Unfortunately, memristive processing-in-memory is highly vulnerable to soft errors and this massive parallelism is not compatible with traditional reliability techniques, such as error-correcting-code (ECC). In this paper, we discuss reliability techniques that efficiently support the mMPU by utilizing the same principles as the mMPU computation. We detail ECC techniques that utilize the unique properties of the mMPU for efficiently utilizing the massive parallelism. Furthermore, we present novel solutions for efficiently implementing triple modular redundancy (TMR). The short-term and long-term reliability of large-scale applications, such as neural-network acceleration, are evaluated. The analysis clearly demonstrates the importance of high-throughput reliability mechanisms for memristive processing-in-memory.
AB - Processing-in-memory (PIM) solutions vastly accelerate systems by reducing data transfer between computation and memory. Memristors possess a unique property that enables storage and logic within the same device, which is exploited in the memristive Memory Processing Unit (mMPU). The mMPU expands fundamental stateful logic techniques, such as IM-PLY, MAGIC and FELIX, to high-throughput parallel logic and arithmetic operations within the memory. Unfortunately, memristive processing-in-memory is highly vulnerable to soft errors and this massive parallelism is not compatible with traditional reliability techniques, such as error-correcting-code (ECC). In this paper, we discuss reliability techniques that efficiently support the mMPU by utilizing the same principles as the mMPU computation. We detail ECC techniques that utilize the unique properties of the mMPU for efficiently utilizing the massive parallelism. Furthermore, we present novel solutions for efficiently implementing triple modular redundancy (TMR). The short-term and long-term reliability of large-scale applications, such as neural-network acceleration, are evaluated. The analysis clearly demonstrates the importance of high-throughput reliability mechanisms for memristive processing-in-memory.
KW - Processing-in-memory (PIM)
KW - error correcting code (ECC)
KW - memristor
KW - reliability
KW - soft errors
KW - stateful logic
KW - triple modular redundancy (TMR)
UR - http://www.scopus.com/inward/record.url?scp=85124618430&partnerID=8YFLogxK
U2 - 10.1109/ICECS53924.2021.9665596
DO - 10.1109/ICECS53924.2021.9665596
M3 - منشور من مؤتمر
T3 - 2021 28th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2021 - Proceedings
BT - 2021 28th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2021 - Proceedings
T2 - 28th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2021
Y2 - 28 November 2021 through 1 December 2021
ER -