Low voltage SRAMs and the scalability of the 9T Supply Feedback SRAM

Janna Mezhibovsky, Adam Teman, Alexander Fish

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review


Recent research has shown that minimum energy operation of digital circuits is in the sub-threshold region, and a good trade-off between power and performance can be achieved through operation at near threshold supply voltages. However, due to process variations and device mismatch at nanoscale technology nodes, voltage scaling of standard SRAMs is limited to strong-inversion operation. One of the techniques for enabling operation at low voltages is implementation of a Supply Feedback mechanism that internally weakens the pull-up current during write operations. This concept was recently implemented in a 9T Supply Feedback SRAM (SF-SRAM) cell, fabricated and successfully tested in a 40nm CMOS technology. In this paper, we review existing low voltage SRAM solutions, overview the SF-SRAM cell, and show its scalability into deep nanoscale technologies by using the 22nm predictive model.

Original languageAmerican English
Title of host publicationProceedings - IEEE International SOC Conference, SOCC 2011
Number of pages6
StatePublished - 28 Dec 2011
Event24th IEEE International System on Chip Conference, SOCC 2011 - Taipei, Taiwan, Province of China
Duration: 26 Sep 201128 Sep 2011

Publication series

NameInternational System on Chip Conference


Conference24th IEEE International System on Chip Conference, SOCC 2011
Country/TerritoryTaiwan, Province of China

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering


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