Low-Voltage DML

Itamar Levi; Alexander Fish

doi:10.1007/978-3-030-40786-5_4

Low-Voltage DML

Itamar Levi, Alexander Fish

Bar-Ilan University

Research output: Chapter in Book/Report/Conference proceeding › Chapter

Abstract

This chapter examines DML performance, energy consumption, static noise margins, delay distribution, robustness, and other design metrics under low-voltage operation. It still focuses on the gate level and DML operations in subthreshold and near-threshold regions...

Original language	English
Title of host publication	Dual Mode Logic
Place of Publication	Cham, Switzerland
Pages	59-73
Number of pages	15
DOIs	https://doi.org/10.1007/978-3-030-40786-5_4
State	Published - 16 Dec 2020

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Keywords

Adder
CMOS
DML
Delay–energy
Dynamic logic
Logical effort
Monte Carlo
Near-threshold (NT)
On-current
Robustness
Sizing
Stacked transistors
Static noise margin (SNM)
Strong inversion
Subthreshold (ST)
Transregional model

Access to Document

10.1007/978-3-030-40786-5_4

Cite this

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title = "Low-Voltage DML",

abstract = "This chapter examines DML performance, energy consumption, static noise margins, delay distribution, robustness, and other design metrics under low-voltage operation. It still focuses on the gate level and DML operations in subthreshold and near-threshold regions...",

keywords = "Adder, CMOS, DML, Delay–energy, Dynamic logic, Logical effort, Monte Carlo, Near-threshold (NT), On-current, Robustness, Sizing, Stacked transistors, Static noise margin (SNM), Strong inversion, Subthreshold (ST), Transregional model",

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KW - Adder

KW - CMOS

KW - DML

KW - Delay–energy

KW - Dynamic logic

KW - Logical effort

KW - Monte Carlo

KW - Near-threshold (NT)

KW - On-current

KW - Robustness

KW - Sizing

KW - Stacked transistors

KW - Static noise margin (SNM)

KW - Strong inversion

KW - Subthreshold (ST)

KW - Transregional model

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DO - 10.1007/978-3-030-40786-5_4

M3 - فصل

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EP - 73

BT - Dual Mode Logic

CY - Cham, Switzerland

ER -

Low-Voltage DML

Abstract

UN SDGs

Keywords

Access to Document

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