Introduction to Dual Mode Logic (DML)

Research output: Chapter in Book/Report/Conference proceedingChapter


This chapter discusses the concept behind DML. It presents DML basic architectures at the circuit level and describes the two modes of DML operation in detail. Specifically, it elaborates on the range of device-level topologies to construct a DML gate and the valid...
Original languageEnglish
Title of host publicationDual Mode Logic
Place of PublicationCham, Switzerland
Number of pages9
StatePublished - 16 Dec 2020


  • Critical path (CP)
  • Drive strength
  • Dual mode logic (DML)
  • Dynamic mode
  • Keeper
  • Minimum delay point (MDP)
  • Minimum energy point (MEP)
  • Pull-down network (PDN)
  • Pull-up network (PUN)
  • Sizing
  • Static logic
  • Static mode
  • Type-A
  • Type-B
  • Un-footed
  • Upsizing


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