High sensitivity detector with robust PVT performance for 60GHz BiST phased array systems in 90nm CMOS

Emanuel Cohen; Amichay Israel; Ofir Degani; Dan Ritter

doi:10.1109/SiRF.2012.6160149

High sensitivity detector with robust PVT performance for 60GHz BiST phased array systems in 90nm CMOS

Emanuel Cohen, Amichay Israel, Ofir Degani, Dan Ritter

Electrical and Computer Engineering

Technion - Israel Institute of Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

A built in self test (BiST) system for a 60GHz phased array chip with high sensitivity large dynamic range detectors is presented. The system measures the array phase shifter relative step with an accuracy of 5deg and the gain of the TX and RX chain through loopback with an accuracy of +/-1dB across process, temperature, and voltage (PVT). The system is composed of an RF combining detector path between chains with switched coupling, low noise detectors based on self mixing, and bias circuits that compensate for temperature and process variation. The Detector off state load on the PA output is 0.2dB.

Original language	English
Title of host publication	2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers
Pages	211-214
Number of pages	4
DOIs	https://doi.org/10.1109/SiRF.2012.6160149
State	Published - 2012
Event	2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Santa Clara, CA, United States Duration: 16 Jan 2012 → 18 Jan 2012

Publication series

Name	2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers

Conference

Conference	2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012
Country/Territory	United States
City	Santa Clara, CA
Period	16/01/12 → 18/01/12

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/SiRF.2012.6160149

Cite this

Cohen, E., Israel, A., Degani, O., & Ritter, D. (2012). High sensitivity detector with robust PVT performance for 60GHz BiST phased array systems in 90nm CMOS. In 2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers (pp. 211-214). Article 6160149 (2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers). https://doi.org/10.1109/SiRF.2012.6160149

Cohen, Emanuel ; Israel, Amichay ; Degani, Ofir et al. / High sensitivity detector with robust PVT performance for 60GHz BiST phased array systems in 90nm CMOS. 2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers. 2012. pp. 211-214 (2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers).

@inproceedings{c702bc9fb31348b28dc0ec8c37c18e7e,

title = "High sensitivity detector with robust PVT performance for 60GHz BiST phased array systems in 90nm CMOS",

abstract = "A built in self test (BiST) system for a 60GHz phased array chip with high sensitivity large dynamic range detectors is presented. The system measures the array phase shifter relative step with an accuracy of 5deg and the gain of the TX and RX chain through loopback with an accuracy of +/-1dB across process, temperature, and voltage (PVT). The system is composed of an RF combining detector path between chains with switched coupling, low noise detectors based on self mixing, and bias circuits that compensate for temperature and process variation. The Detector off state load on the PA output is 0.2dB.",

author = "Emanuel Cohen and Amichay Israel and Ofir Degani and Dan Ritter",

year = "2012",

doi = "10.1109/SiRF.2012.6160149",

language = "الإنجليزيّة",

isbn = "9781457713163",

series = "2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers",

pages = "211--214",

booktitle = "2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers",

note = "2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 ; Conference date: 16-01-2012 Through 18-01-2012",

}

Cohen, E, Israel, A, Degani, O & Ritter, D 2012, High sensitivity detector with robust PVT performance for 60GHz BiST phased array systems in 90nm CMOS. in 2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers., 6160149, 2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers, pp. 211-214, 2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012, Santa Clara, CA, United States, 16/01/12. https://doi.org/10.1109/SiRF.2012.6160149

High sensitivity detector with robust PVT performance for 60GHz BiST phased array systems in 90nm CMOS. / Cohen, Emanuel; Israel, Amichay; Degani, Ofir et al.
2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers. 2012. p. 211-214 6160149 (2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Degani, Ofir

AU - Ritter, Dan

PY - 2012

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N2 - A built in self test (BiST) system for a 60GHz phased array chip with high sensitivity large dynamic range detectors is presented. The system measures the array phase shifter relative step with an accuracy of 5deg and the gain of the TX and RX chain through loopback with an accuracy of +/-1dB across process, temperature, and voltage (PVT). The system is composed of an RF combining detector path between chains with switched coupling, low noise detectors based on self mixing, and bias circuits that compensate for temperature and process variation. The Detector off state load on the PA output is 0.2dB.

AB - A built in self test (BiST) system for a 60GHz phased array chip with high sensitivity large dynamic range detectors is presented. The system measures the array phase shifter relative step with an accuracy of 5deg and the gain of the TX and RX chain through loopback with an accuracy of +/-1dB across process, temperature, and voltage (PVT). The system is composed of an RF combining detector path between chains with switched coupling, low noise detectors based on self mixing, and bias circuits that compensate for temperature and process variation. The Detector off state load on the PA output is 0.2dB.

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M3 - منشور من مؤتمر

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BT - 2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers

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Cohen E, Israel A, Degani O, Ritter D. High sensitivity detector with robust PVT performance for 60GHz BiST phased array systems in 90nm CMOS. In 2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers. 2012. p. 211-214. 6160149. (2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers). doi: 10.1109/SiRF.2012.6160149

High sensitivity detector with robust PVT performance for 60GHz BiST phased array systems in 90nm CMOS

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