Abstract
Semiconducting nanowires have been pointed out as one of the most promising building blocks for submicron electrical applications. These nanometer materials open new opportunities in the area of post-planar traditional metal-oxide-semiconductor devices. Herein, we demonstrate a new technique to fabricate horizontally suspended silicon nanowires with gate-all-around field-effect transistors. We present the design, fabrication and electrical measurements of a high performance transistor with high on current density (150μAμm 1), high on/off current ratio (10 6), low threshold voltage (0.4V), low subthreshold slope (100mV /dec) and high transconductance (g m9.5μS). These high performance characteristics were possible due to the tight electrostatic coupling of the surrounding gate, which significantly reduced the Schottky-barrier effective height, as was confirmed experimentally in this study.
Original language | English |
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Article number | 395202 |
Journal | Nanotechnology |
Volume | 23 |
Issue number | 39 |
DOIs | |
State | Published - 5 Oct 2012 |
All Science Journal Classification (ASJC) codes
- General Chemistry
- Mechanics of Materials
- Mechanical Engineering
- Bioengineering
- Electrical and Electronic Engineering
- General Materials Science