TY - GEN
T1 - Flexible Proof Production in an Industrial-Strength SMT Solver
AU - Barbosa, Haniel
AU - Reynolds, Andrew
AU - Kremer, Gereon
AU - Lachnitt, Hanna
AU - Niemetz, Aina
AU - Nötzli, Andres
AU - Ozdemir, Alex
AU - Preiner, Mathias
AU - Viswanathan, Arjun
AU - Viteri, Scott
AU - Zohar, Yoni
AU - Tinelli, Cesare
AU - Barrett, Clark
N1 - Publisher Copyright: © 2022, The Author(s).
PY - 2022
Y1 - 2022
N2 - Proof production for SMT solvers is paramount to ensure their correctness independently from implementations, which are often prohibitively difficult to verify. Historically, however, SMT proof production has struggled with performance and coverage issues, resulting in the disabling of many crucial solving techniques and in coarse-grained (and thus hard to check) proofs. We present a flexible proof-production architecture designed to handle the complexity of versatile, industrial-strength SMT solvers and show how we leverage it to produce detailed proofs, including for components previously unsupported by any solver. The architecture allows proofs to be produced modularly, lazily, and with numerous safeguards for correctness. This architecture has been implemented in the state-of-the-art SMT solver cvc5. We evaluate its proofs for SMT-LIB benchmarks and show that the new architecture produces better coverage than previous approaches, has acceptable performance overhead, and supports detailed proofs for most solving components.
AB - Proof production for SMT solvers is paramount to ensure their correctness independently from implementations, which are often prohibitively difficult to verify. Historically, however, SMT proof production has struggled with performance and coverage issues, resulting in the disabling of many crucial solving techniques and in coarse-grained (and thus hard to check) proofs. We present a flexible proof-production architecture designed to handle the complexity of versatile, industrial-strength SMT solvers and show how we leverage it to produce detailed proofs, including for components previously unsupported by any solver. The architecture allows proofs to be produced modularly, lazily, and with numerous safeguards for correctness. This architecture has been implemented in the state-of-the-art SMT solver cvc5. We evaluate its proofs for SMT-LIB benchmarks and show that the new architecture produces better coverage than previous approaches, has acceptable performance overhead, and supports detailed proofs for most solving components.
UR - http://www.scopus.com/inward/record.url?scp=85135771473&partnerID=8YFLogxK
U2 - 10.1007/978-3-031-10769-6_3
DO - 10.1007/978-3-031-10769-6_3
M3 - منشور من مؤتمر
SN - 9783031107689
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 15
EP - 35
BT - Automated Reasoning - 11th International Joint Conference, IJCAR 2022, Proceedings
A2 - Blanchette, Jasmin
A2 - Kovács, Laura
A2 - Pattinson, Dirk
PB - Springer Science and Business Media Deutschland GmbH
T2 - 11th International Joint Conference on Automated Reasoning, IJCAR 2022, part of the Federated Logic Conference, FLoC 2022
Y2 - 8 August 2022 through 10 August 2022
ER -