Design Constraints Generalization for Series-Stacked Buffer-Based Active DC Links

Pavel Strajnikov; Nissim Amar; Vladimir Yuhimenko; Ilan Aharon; Alon Kuperman

doi:https://doi.org/10.1109/TIE.2023.3260341

Design Constraints Generalization for Series-Stacked Buffer-Based Active DC Links

Pavel Strajnikov, Nissim Amar, Vladimir Yuhimenko, Ilan Aharon, Alon Kuperman

Ben-Gurion University of the Negev, Ariel University

Research output: Contribution to journal › Article › peer-review

Abstract

Series-stacked buffer (SSB)-based active dc links aim to increase power density by replacing bulky dc link capacitor with series connection of significantly lower valued capacitor and auxiliary bidirectional dc/ac converter. SSB design constraint describing quantitative relation between passive components values and system power rating was established to achieve minimal remaining dc link voltage ripple magnitude. This letter generalizes the above requirement, revealing that allowing nonminimum magnitude of residual dc link voltage ripple releases other design constraints, yielding a more optimal solution in terms of full-rating capacitance utilized and/or auxiliary bidirectional dc/ac converter volt-ampere rating. Experimental results validate the proposed methodology, matching corresponding analytical predictions.

Original language	American English
Pages (from-to)	2133-2136
Number of pages	4
Journal	IEEE Transactions on Industrial Electronics
Volume	71
Issue number	2
DOIs	https://doi.org/10.1109/TIE.2023.3260341
State	Published - 1 Feb 2024

Keywords

Active dc link (ADCL)
reduced rating converter
series-stacked buffer (SSB)

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering
Control and Systems Engineering

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https://doi.org/10.1109/TIE.2023.3260341

Cite this

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title = "Design Constraints Generalization for Series-Stacked Buffer-Based Active DC Links",

abstract = "Series-stacked buffer (SSB)-based active dc links aim to increase power density by replacing bulky dc link capacitor with series connection of significantly lower valued capacitor and auxiliary bidirectional dc/ac converter. SSB design constraint describing quantitative relation between passive components values and system power rating was established to achieve minimal remaining dc link voltage ripple magnitude. This letter generalizes the above requirement, revealing that allowing nonminimum magnitude of residual dc link voltage ripple releases other design constraints, yielding a more optimal solution in terms of full-rating capacitance utilized and/or auxiliary bidirectional dc/ac converter volt-ampere rating. Experimental results validate the proposed methodology, matching corresponding analytical predictions.",

keywords = "Active dc link (ADCL), reduced rating converter, series-stacked buffer (SSB)",

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AU - Strajnikov, Pavel

AU - Amar, Nissim

AU - Yuhimenko, Vladimir

AU - Aharon, Ilan

AU - Kuperman, Alon

PY - 2024/2/1

Y1 - 2024/2/1

N2 - Series-stacked buffer (SSB)-based active dc links aim to increase power density by replacing bulky dc link capacitor with series connection of significantly lower valued capacitor and auxiliary bidirectional dc/ac converter. SSB design constraint describing quantitative relation between passive components values and system power rating was established to achieve minimal remaining dc link voltage ripple magnitude. This letter generalizes the above requirement, revealing that allowing nonminimum magnitude of residual dc link voltage ripple releases other design constraints, yielding a more optimal solution in terms of full-rating capacitance utilized and/or auxiliary bidirectional dc/ac converter volt-ampere rating. Experimental results validate the proposed methodology, matching corresponding analytical predictions.

AB - Series-stacked buffer (SSB)-based active dc links aim to increase power density by replacing bulky dc link capacitor with series connection of significantly lower valued capacitor and auxiliary bidirectional dc/ac converter. SSB design constraint describing quantitative relation between passive components values and system power rating was established to achieve minimal remaining dc link voltage ripple magnitude. This letter generalizes the above requirement, revealing that allowing nonminimum magnitude of residual dc link voltage ripple releases other design constraints, yielding a more optimal solution in terms of full-rating capacitance utilized and/or auxiliary bidirectional dc/ac converter volt-ampere rating. Experimental results validate the proposed methodology, matching corresponding analytical predictions.

KW - Active dc link (ADCL)

KW - reduced rating converter

KW - series-stacked buffer (SSB)

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JO - IEEE Transactions on Industrial Electronics

JF - IEEE Transactions on Industrial Electronics

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Design Constraints Generalization for Series-Stacked Buffer-Based Active DC Links

Abstract

Keywords

All Science Journal Classification (ASJC) codes

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