Abstract
Multi level memory cells (MLC) are used in nonvolatile memories in order to increase storage density. Using
multi-level cells, however, imposes higher read and write latencies
limiting high speed applications. In this work we study the
tradeoff between storage density and write speed in the context
of providing access-speed heterogeneity within the same memory
media. The main tool for that is a code that gives high writeaccess speeds for a given reduction in storage density. We describe
the code, give an analytical treatment of its storage rate and
speed, and compare it with a more basic write scheme.
multi-level cells, however, imposes higher read and write latencies
limiting high speed applications. In this work we study the
tradeoff between storage density and write speed in the context
of providing access-speed heterogeneity within the same memory
media. The main tool for that is a code that gives high writeaccess speeds for a given reduction in storage density. We describe
the code, give an analytical treatment of its storage rate and
speed, and compare it with a more basic write scheme.
Original language | American English |
---|---|
Title of host publication | 5th Annual Non-Volatile Memories Workshop 2014 |
Subtitle of host publication | NVMW 2014 |
State | Published - 2014 |