TY - GEN
T1 - Bitwise Logic Using Phase Change Memory Devices Based on the Pinatubo Architecture
AU - Aflalo, Noa
AU - Yalon, Eilam
AU - Kvatinsky, Shahar
N1 - Publisher Copyright: © 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - This paper experimentally demonstrates a near-crossbar memory logic technique called Pinatubo. Pinatubo, an acronym for Processing In Non-volatile memory ArchiTecture for bUlk Bitwise Operations, facilitates the concurrent activation of two or more rows, enabling bitwise operations such as OR, AND, XOR, and NOT on the activated rows. We implement Pinatubo using phase change memory (PCM) and compare our experimental results with the simulated data from the original Pinatubo study. Our findings highlight a significant four-orders of magnitude difference between resistance states, suggesting the robustness of the Pinatubo architecture with PCM technology.
AB - This paper experimentally demonstrates a near-crossbar memory logic technique called Pinatubo. Pinatubo, an acronym for Processing In Non-volatile memory ArchiTecture for bUlk Bitwise Operations, facilitates the concurrent activation of two or more rows, enabling bitwise operations such as OR, AND, XOR, and NOT on the activated rows. We implement Pinatubo using phase change memory (PCM) and compare our experimental results with the simulated data from the original Pinatubo study. Our findings highlight a significant four-orders of magnitude difference between resistance states, suggesting the robustness of the Pinatubo architecture with PCM technology.
KW - Arithmetic Logic Unit (ALU)
KW - Central Processing Unit (CPU)
KW - Phase change memory (PCM)
KW - Pinatubo
KW - non-stateful logic
KW - non-volatile memories (NVMs)
KW - processing-in-memory (PIM)
KW - sense amplifier (SA)
UR - http://www.scopus.com/inward/record.url?scp=85190385098&partnerID=8YFLogxK
U2 - https://doi.org/10.1109/VLSID60093.2024.00103
DO - https://doi.org/10.1109/VLSID60093.2024.00103
M3 - منشور من مؤتمر
T3 - Proceedings of the IEEE International Conference on VLSI Design
SP - 583
EP - 586
BT - Proceedings - 37th International Conference on VLSI Design, VLSID 2024 - held concurrently with 23rd International Conference on Embedded Systems, ES 2024
T2 - 37th International Conference on VLSI Design, VLSID 2024
Y2 - 6 January 2024 through 10 January 2024
ER -