TY - GEN
T1 - Asynchronous signalling processes
AU - Manohar, Rajit
AU - Moses, Yoram
N1 - Publisher Copyright: © 2019 IEEE.
PY - 2019/5
Y1 - 2019/5
N2 - A model of processes that interact via asynchronous wires carrying Boolean signals is presented. In this model, modules, called processes, can be made arbitrarily complex, can maintain local memory and can have an arbitrary number of inputs and outputs. A variety of circuit models can be represented by networks of signalling processes. It is shown that in a network of signalling processes consisting solely of single-ouput processes and forks, every module is an eventual C element. Consequently, the computational power of such a network is severely limited. This establishes that the celebrated C-element property of DI circuits follows solely from the fact that single output modules communicate over stable asynchronous wires. Conversely, it is shown that any Boolean function can be implemented using four input/two-output processes where every process is either one gate (single output) or a pair of gates (two output).
AB - A model of processes that interact via asynchronous wires carrying Boolean signals is presented. In this model, modules, called processes, can be made arbitrarily complex, can maintain local memory and can have an arbitrary number of inputs and outputs. A variety of circuit models can be represented by networks of signalling processes. It is shown that in a network of signalling processes consisting solely of single-ouput processes and forks, every module is an eventual C element. Consequently, the computational power of such a network is severely limited. This establishes that the celebrated C-element property of DI circuits follows solely from the fact that single output modules communicate over stable asynchronous wires. Conversely, it is shown that any Boolean function can be implemented using four input/two-output processes where every process is either one gate (single output) or a pair of gates (two output).
KW - Delay insensitive circuits
UR - http://www.scopus.com/inward/record.url?scp=85073351586&partnerID=8YFLogxK
U2 - 10.1109/ASYNC.2019.00018
DO - 10.1109/ASYNC.2019.00018
M3 - منشور من مؤتمر
T3 - Proceedings - International Symposium on Asynchronous Circuits and Systems
SP - 68
EP - 75
BT - Proceedings - 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019
T2 - 25th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2019
Y2 - 12 May 2019 through 15 May 2019
ER -