Algorithmic considerations in memristive Memory Processing Units (MPU)

Rotem Ben-Hur, Nishil Talati, Shahar Kvatinsky

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Memristive technologies are attractive candidates to replace conventional memory technologies, and can also be used to perform logic and arithmetic operations using a technique called 'stateful logic.' Combining data storage and computation in the memory array enables a novel non-von Neumann architecture, where both the operations are performed within a Memory Processing Unit (MPU). The use of an MPU alleviates the primary restriction on performance and energy in von Neumann machine, which is the data transfer between CPU and memory. To optimize the speed, energy, and area efficiency of the MPU, different algorithms need to be developed. This paper discusses the considerations in setting the sequence of computing operations in an MPU and presents examples of two operations that can benefit from processing within memristive memory.

Original languageEnglish
Title of host publicationCNNA 2016 - 15th International Workshop on Cellular Nanoscale Networks and Their Applications
EditorsRonald Tetzlaff
Pages93-94
Number of pages2
ISBN (Electronic)9783800742523
StatePublished - 2016
Event15th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2016 - Dresden, Germany
Duration: 23 Aug 201625 Aug 2016

Publication series

NameInternational Workshop on Cellular Nanoscale Networks and their Applications
Volume2016-August

Conference

Conference15th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2016
Country/TerritoryGermany
CityDresden
Period23/08/1625/08/16

Keywords

  • CPU
  • Crossbar memory
  • Logic design
  • MAGIC
  • MPU
  • Memory controller
  • Memristive systems
  • Memristor

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Electrical and Electronic Engineering

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