TY - CHAP
T1 - A taxonomy and evaluation framework for memristive logic
AU - Reuben, John
AU - Talati, Nishil
AU - Wald, Nimrod
AU - Ben-Hur, Rotem
AU - Ali, Ameer Haj
AU - Gaillardon, Pierre Emmanuel
AU - Kvatinsky, Shahar
N1 - Publisher Copyright: © Springer Nature Switzerland AG 2019.
PY - 2019/1/1
Y1 - 2019/1/1
N2 - Memristive logic design, the methodology of designing logic circuits using memristors, is an emerging concept whose growth is fueled by the quest for energy-efficient computing systems. Many memristive logic families have evolved, with diverse attributes, and a mature comparison is needed to judge their merits. This chapter presents a framework for comparing logic families by classifying them on the basis of fundamental properties, statefulness, proximity (to the memory array), and flexibility of computation. We propose metrics to compare memristive logic families using analytic expressions for latency, energy efficiency, and area. We then conduct a case study of an eight-bit addition operation to demonstrate our evaluation methodology. We also perform vector operations and give insights into the potential of these logic families to compute on large sets of data. Our purpose is to provide a methodology for comparing existing logic families and facilitate the evaluation of new ones.
AB - Memristive logic design, the methodology of designing logic circuits using memristors, is an emerging concept whose growth is fueled by the quest for energy-efficient computing systems. Many memristive logic families have evolved, with diverse attributes, and a mature comparison is needed to judge their merits. This chapter presents a framework for comparing logic families by classifying them on the basis of fundamental properties, statefulness, proximity (to the memory array), and flexibility of computation. We propose metrics to compare memristive logic families using analytic expressions for latency, energy efficiency, and area. We then conduct a case study of an eight-bit addition operation to demonstrate our evaluation methodology. We also perform vector operations and give insights into the potential of these logic families to compute on large sets of data. Our purpose is to provide a methodology for comparing existing logic families and facilitate the evaluation of new ones.
UR - http://www.scopus.com/inward/record.url?scp=85068607049&partnerID=8YFLogxK
U2 - https://doi.org/10.1007/978-3-319-76375-0_37
DO - https://doi.org/10.1007/978-3-319-76375-0_37
M3 - فصل
SN - 9783319763743
SP - 1065
EP - 1099
BT - Handbook of Memristor Networks
ER -