@inproceedings{4623866739cb459b856ff700be914ed4,
title = "A soft error tolerant 4T gain-cell featuring a parity column for ultra-low power applications",
abstract = "Embedded memories often constitute over 50% of the total silicon area and are the main consumer of static power in ultra-low power (ULP) applications. Operation at sub-threshold supply voltages can significantly reduce the power dissipation of memory arrays, however it also results in lower noise margins and much higher susceptibility to radiation effects, such as soft errors or single event upsets (SEU).",
author = "Robert Giterman and Adam Teman and Lior Atias and Alexander Fish",
note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015 ; Conference date: 05-10-2015 Through 08-10-2015",
year = "2015",
month = nov,
day = "20",
doi = "10.1109/S3S.2015.7333525",
language = "الإنجليزيّة",
series = "2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015",
address = "الولايات المتّحدة",
}