A mm-Wave Blocker-Tolerant Receiver Achieving <4 dB NF and -3.5 dBm B1dB in 65-nm CMOS

Erez Zolkov; Nimrod Ginzberg; Emanuel Cohen

doi:10.1109/RFIC54547.2023.10186175

A mm-Wave Blocker-Tolerant Receiver Achieving <4 dB NF and -3.5 dBm B1dB in 65-nm CMOS

Erez Zolkov, Nimrod Ginzberg, Emanuel Cohen

Technion - Israel Institute of Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Digital beam-forming requires highly linear receivers (RXs), as null steering is performed only in digital baseband (BB). This paper presents a highly linear RX, with a high out-of-band (OOB) blocker tolerance without sacrificing performance or power, utilizing a highly linear inverter low-noise amplifier (LNA), followed by an N-path mixer with tunable filtering properties and a BB transimpedance (TIA) amplifier for linearity enhancement. The N-path mixer design trade-offs are discussed, and several linear LNA topologies are presented and compared. A chip prototype was manufactured in a TSMC 65 nm CMOS process. In our implementation, a <4 dB noise figure (NF) is achieved, with an RX gain of 40 dB, in-band (IB) IIP3 of -20 dBm and -3.5 dBm BldB at a 500 MHz offset, while occupying an active area of 1.62 mm2 and drawing a total power of 76.8 mW. at a frequency range of 22-31 GHz.

Original language	English
Title of host publication	2023 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2023
Editors	Jennifer Kitchen, Steven Turner
Pages	297-300
Number of pages	4
ISBN (Electronic)	9798350321227
DOIs	https://doi.org/10.1109/RFIC54547.2023.10186175
State	Published - 2023
Event	2023 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2023 - San Diego, United States Duration: 11 Jun 2023 → 13 Jun 2023

Publication series

Name	Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
Volume	2023-June

Conference

Conference	2023 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2023
Country/Territory	United States
City	San Diego
Period	11/06/23 → 13/06/23

Keywords

CMOS
N-path mixer
digital beam-forming
mm-wave receiver

All Science Journal Classification (ASJC) codes

General Engineering

Access to Document

10.1109/RFIC54547.2023.10186175

Cite this

Zolkov, E., Ginzberg, N., & Cohen, E. (2023). A mm-Wave Blocker-Tolerant Receiver Achieving <4 dB NF and -3.5 dBm B1dB in 65-nm CMOS. In J. Kitchen, & S. Turner (Eds.), 2023 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2023 (pp. 297-300). (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium; Vol. 2023-June). https://doi.org/10.1109/RFIC54547.2023.10186175

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title = "A mm-Wave Blocker-Tolerant Receiver Achieving <4 dB NF and -3.5 dBm B1dB in 65-nm CMOS",

abstract = "Digital beam-forming requires highly linear receivers (RXs), as null steering is performed only in digital baseband (BB). This paper presents a highly linear RX, with a high out-of-band (OOB) blocker tolerance without sacrificing performance or power, utilizing a highly linear inverter low-noise amplifier (LNA), followed by an N-path mixer with tunable filtering properties and a BB transimpedance (TIA) amplifier for linearity enhancement. The N-path mixer design trade-offs are discussed, and several linear LNA topologies are presented and compared. A chip prototype was manufactured in a TSMC 65 nm CMOS process. In our implementation, a <4 dB noise figure (NF) is achieved, with an RX gain of 40 dB, in-band (IB) IIP3 of -20 dBm and -3.5 dBm BldB at a 500 MHz offset, while occupying an active area of 1.62 mm2 and drawing a total power of 76.8 mW. at a frequency range of 22-31 GHz.",

keywords = "CMOS, N-path mixer, digital beam-forming, mm-wave receiver",

author = "Erez Zolkov and Nimrod Ginzberg and Emanuel Cohen",

note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 2023 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2023 ; Conference date: 11-06-2023 Through 13-06-2023",

year = "2023",

doi = "10.1109/RFIC54547.2023.10186175",

language = "الإنجليزيّة",

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Zolkov, E, Ginzberg, N & Cohen, E 2023, A mm-Wave Blocker-Tolerant Receiver Achieving <4 dB NF and -3.5 dBm B1dB in 65-nm CMOS. in J Kitchen & S Turner (eds), 2023 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2023. Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium, vol. 2023-June, pp. 297-300, 2023 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2023, San Diego, United States, 11/06/23. https://doi.org/10.1109/RFIC54547.2023.10186175

A mm-Wave Blocker-Tolerant Receiver Achieving <4 dB NF and -3.5 dBm B1dB in 65-nm CMOS. / Zolkov, Erez; Ginzberg, Nimrod ; Cohen, Emanuel.
2023 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2023. ed. / Jennifer Kitchen; Steven Turner. 2023. p. 297-300 (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium; Vol. 2023-June).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Ginzberg, Nimrod

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PY - 2023

Y1 - 2023

N2 - Digital beam-forming requires highly linear receivers (RXs), as null steering is performed only in digital baseband (BB). This paper presents a highly linear RX, with a high out-of-band (OOB) blocker tolerance without sacrificing performance or power, utilizing a highly linear inverter low-noise amplifier (LNA), followed by an N-path mixer with tunable filtering properties and a BB transimpedance (TIA) amplifier for linearity enhancement. The N-path mixer design trade-offs are discussed, and several linear LNA topologies are presented and compared. A chip prototype was manufactured in a TSMC 65 nm CMOS process. In our implementation, a <4 dB noise figure (NF) is achieved, with an RX gain of 40 dB, in-band (IB) IIP3 of -20 dBm and -3.5 dBm BldB at a 500 MHz offset, while occupying an active area of 1.62 mm2 and drawing a total power of 76.8 mW. at a frequency range of 22-31 GHz.

AB - Digital beam-forming requires highly linear receivers (RXs), as null steering is performed only in digital baseband (BB). This paper presents a highly linear RX, with a high out-of-band (OOB) blocker tolerance without sacrificing performance or power, utilizing a highly linear inverter low-noise amplifier (LNA), followed by an N-path mixer with tunable filtering properties and a BB transimpedance (TIA) amplifier for linearity enhancement. The N-path mixer design trade-offs are discussed, and several linear LNA topologies are presented and compared. A chip prototype was manufactured in a TSMC 65 nm CMOS process. In our implementation, a <4 dB noise figure (NF) is achieved, with an RX gain of 40 dB, in-band (IB) IIP3 of -20 dBm and -3.5 dBm BldB at a 500 MHz offset, while occupying an active area of 1.62 mm2 and drawing a total power of 76.8 mW. at a frequency range of 22-31 GHz.

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M3 - منشور من مؤتمر

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ER -

A mm-Wave Blocker-Tolerant Receiver Achieving <4 dB NF and -3.5 dBm B1dB in 65-nm CMOS

Abstract

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Keywords

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