A low-power low-cost 24 GHz RFID tag with a C-Flash based embedded memory

Hadar Dagan, Aviv Shapira, Adam Teman, Samuel Jameson, Evgeny Pikhay, Vladislav Dayan, Yakov Roizin, Eran Socher, Alexander Fish

Research output: Contribution to journalArticlepeer-review


The key factor in widespread adoption of Radio Frequency Identification (RFID) technology is tag cost minimization. This paper presents the first low-cost, ultra-low power, passive RFID tag, fully integrated on a single substrate in a standard CMOS process. The system combines a 24 GHz, dual on-chip antenna, RF front-end, and a C-Flash based, rewritable, non-volatile memory module to achieve full on-chip system integration. The complete system was designed and fabricated in the TowerJazz 0.18 μm CMOS technology without any additional mask adders. By embedding the RF, memory, and digital components together upon a single substrate in a standard digital process, the low-cost aspirations of the "5-cent RFID tag" become feasible. Design considerations, analysis, circuit implementations, and measurement results are presented. The entire system was fabricated on a 3.6 mm × 1.6 mm (6.9 mm2) die with the integrated antennas comprising 82% of the silicon area. The total read power was measured to be 13.2 μW, which is sufficiently supplied by the on-chip energy harvesting unit.

Original languageAmerican English
Article number6832604
Pages (from-to)1942-1957
Number of pages16
JournalIEEE Journal of Solid-State Circuits
Issue number9
StatePublished - 1 Jan 2014


  • C-Flash
  • RFIC
  • RFID tags
  • low-cost
  • low-power
  • non-volatile memory
  • on-chip antenna
  • radio frequency identification

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering


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