A Low-Energy DMTJ-Based Ternary Content- Addressable Memory With Reliable Sub-Nanosecond Search Operation

Esteban Garzon; Leonid Yavits; Giovanni Finocchio; Mario Carpentieri; Adam Teman; Marco Lanuzza

doi:10.1109/ACCESS.2023.3245981

A Low-Energy DMTJ-Based Ternary Content- Addressable Memory With Reliable Sub-Nanosecond Search Operation

Esteban Garzon, Leonid Yavits, Giovanni Finocchio, Mario Carpentieri, Adam Teman, Marco Lanuzza

Bar-Ilan University - The Alexander Kofkin Faculty of Engineering

Bar-Ilan University

Research output: Contribution to journal › Article › peer-review

Abstract

In this paper, we propose an energy-efficient, reliable, hybrid, 10-transistor/2-Double-Barrier-Magnetic-Tunnel-Junction (10T2DMTJ) non-volatile (NV) ternary content-addressable memory (TCAM) with sub-nanosecond search operation. Our cell design relies on low-energy-demanding MTJs organized in a low-complexity voltage-divider-based circuit along with a simple dynamic logic CMOS matching network, which improves the search reliability. The proposed NV-TCAM was designed in 28 nm FDSOI process and evaluated under exhaustive Monte Carlo simulations. When compared to the best previous proposed NV-TCAMs, our solution achieves lower search error rate (3.8 ×) and lower write and search energy (-73% and-79%, respectively), while also exhibiting smaller area footprint (-74%). Such benefits are achieved at the expense of reduced search speed.

Original language	American English
Pages (from-to)	16812-16819
Number of pages	8
Journal	IEEE Access
Volume	11
DOIs	https://doi.org/10.1109/ACCESS.2023.3245981
State	Published - 1 Jan 2023

Keywords

Double-barrier MTJ
energy-efficiency
low-power
non-volatile TCAM (NV-TCAM)

All Science Journal Classification (ASJC) codes

General Computer Science
General Materials Science
General Engineering
Electrical and Electronic Engineering

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/ACCESS.2023.3245981

Cite this

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title = "A Low-Energy DMTJ-Based Ternary Content- Addressable Memory With Reliable Sub-Nanosecond Search Operation",

abstract = "In this paper, we propose an energy-efficient, reliable, hybrid, 10-transistor/2-Double-Barrier-Magnetic-Tunnel-Junction (10T2DMTJ) non-volatile (NV) ternary content-addressable memory (TCAM) with sub-nanosecond search operation. Our cell design relies on low-energy-demanding MTJs organized in a low-complexity voltage-divider-based circuit along with a simple dynamic logic CMOS matching network, which improves the search reliability. The proposed NV-TCAM was designed in 28 nm FDSOI process and evaluated under exhaustive Monte Carlo simulations. When compared to the best previous proposed NV-TCAMs, our solution achieves lower search error rate (3.8 ×) and lower write and search energy (-73% and-79%, respectively), while also exhibiting smaller area footprint (-74%). Such benefits are achieved at the expense of reduced search speed.",

keywords = "Double-barrier MTJ, energy-efficiency, low-power, non-volatile TCAM (NV-TCAM)",

author = "Esteban Garzon and Leonid Yavits and Giovanni Finocchio and Mario Carpentieri and Adam Teman and Marco Lanuzza",

note = "Publisher Copyright: {\textcopyright} 2013 IEEE.",

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doi = "10.1109/ACCESS.2023.3245981",

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AU - Garzon, Esteban

AU - Yavits, Leonid

AU - Finocchio, Giovanni

AU - Carpentieri, Mario

AU - Teman, Adam

AU - Lanuzza, Marco

PY - 2023/1/1

Y1 - 2023/1/1

N2 - In this paper, we propose an energy-efficient, reliable, hybrid, 10-transistor/2-Double-Barrier-Magnetic-Tunnel-Junction (10T2DMTJ) non-volatile (NV) ternary content-addressable memory (TCAM) with sub-nanosecond search operation. Our cell design relies on low-energy-demanding MTJs organized in a low-complexity voltage-divider-based circuit along with a simple dynamic logic CMOS matching network, which improves the search reliability. The proposed NV-TCAM was designed in 28 nm FDSOI process and evaluated under exhaustive Monte Carlo simulations. When compared to the best previous proposed NV-TCAMs, our solution achieves lower search error rate (3.8 ×) and lower write and search energy (-73% and-79%, respectively), while also exhibiting smaller area footprint (-74%). Such benefits are achieved at the expense of reduced search speed.

AB - In this paper, we propose an energy-efficient, reliable, hybrid, 10-transistor/2-Double-Barrier-Magnetic-Tunnel-Junction (10T2DMTJ) non-volatile (NV) ternary content-addressable memory (TCAM) with sub-nanosecond search operation. Our cell design relies on low-energy-demanding MTJs organized in a low-complexity voltage-divider-based circuit along with a simple dynamic logic CMOS matching network, which improves the search reliability. The proposed NV-TCAM was designed in 28 nm FDSOI process and evaluated under exhaustive Monte Carlo simulations. When compared to the best previous proposed NV-TCAMs, our solution achieves lower search error rate (3.8 ×) and lower write and search energy (-73% and-79%, respectively), while also exhibiting smaller area footprint (-74%). Such benefits are achieved at the expense of reduced search speed.

KW - Double-barrier MTJ

KW - energy-efficiency

KW - low-power

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DO - 10.1109/ACCESS.2023.3245981

M3 - Article

SN - 2169-3536

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SP - 16812

EP - 16819

JO - IEEE Access

JF - IEEE Access

ER -

A Low-Energy DMTJ-Based Ternary Content- Addressable Memory With Reliable Sub-Nanosecond Search Operation

Abstract

Keywords

All Science Journal Classification (ASJC) codes

UN SDGs

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