A low-cost low-power non-volatile memory for RFID applications

Hadar Dagan; Adam Teman; Alexander Fish; Evgeny Pikhay; Vladislav Dayan; Yakov Roizin

doi:10.1109/ISCAS.2012.6271623

A low-cost low-power non-volatile memory for RFID applications

Hadar Dagan, Adam Teman, Alexander Fish, Evgeny Pikhay, Vladislav Dayan, Yakov Roizin

Ben-Gurion University of the Negev

Research output: Contribution to conference › Paper › peer-review

Abstract

One of the main obstacles delaying a more widespread use of radio frequency identification (RFID) tags is cost. A critical element of any RFID system is a low power embedded non-volatile memory (NVM) that can be fabricated without additional masks to the core CMOS process. In this paper, we present a 256-bit re-writeable NVM array, implemented in the TowerJazz 0.18μm CMOS process using only standard logic process steps and masks. Based on the single-poly C-Flash bitcell, this array achieves an extremely low static power figure of 3.8μW during operation cycles.

Original language	American English
Pages	1827-1830
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2012.6271623
State	Published - 28 Sep 2012
Event	2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of Duration: 20 May 2012 → 23 May 2012

Conference

Conference	2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
Country/Territory	Korea, Republic of
City	Seoul
Period	20/05/12 → 23/05/12

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/ISCAS.2012.6271623

Cite this

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AU - Dagan, Hadar

AU - Teman, Adam

AU - Fish, Alexander

AU - Pikhay, Evgeny

AU - Dayan, Vladislav

AU - Roizin, Yakov

PY - 2012/9/28

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AB - One of the main obstacles delaying a more widespread use of radio frequency identification (RFID) tags is cost. A critical element of any RFID system is a low power embedded non-volatile memory (NVM) that can be fabricated without additional masks to the core CMOS process. In this paper, we present a 256-bit re-writeable NVM array, implemented in the TowerJazz 0.18μm CMOS process using only standard logic process steps and masks. Based on the single-poly C-Flash bitcell, this array achieves an extremely low static power figure of 3.8μW during operation cycles.

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T2 - 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012

Y2 - 20 May 2012 through 23 May 2012

ER -

A low-cost low-power non-volatile memory for RFID applications

Abstract

Conference

All Science Journal Classification (ASJC) codes

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