A compact 105-130 GHz push-push doubler, with 4dBm Psat and 18% efficiency in 28nm CMOS

Nitzan Oz, Emanuel Cohen

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A high power doubler design for F-band frequencies, which covers 105-130 GHz, has been designed in low voltage process 1.1 V, 28nm CMOS. A new approach for shorting the 2nd harmonic in the input network and balancing the input balun at the fundamental frequency have been proposed for shrinking the doubler size. The doubler shows a peak output power of +4 dBm at 120 GHz with 18% efficiency at a bias voltage of 0V, and a peak gain of-2.2 dB, and occupy a size of a 0.03mm2. First pass success was achieved by running full EM simulation with component extractions resulting in excellent measurement fit to simulations.

Original languageEnglish
Title of host publicationEuropean Microwave Week 2015
Subtitle of host publication"Freedom Through Microwaves", EuMW 2015 - Conference Proceedings; 2015 10th European Microwave Integrated Circuits Conference Proceedings, EuMIC
Pages101-104
Number of pages4
ISBN (Electronic)9782874870408
DOIs
StatePublished - 2 Dec 2015
Event10th European Microwave Integrated Circuits Conference, EuMIC 2015 - Paris, France
Duration: 7 Sep 20158 Sep 2015

Publication series

NameEuropean Microwave Week 2015:

Conference

Conference10th European Microwave Integrated Circuits Conference, EuMIC 2015
Country/TerritoryFrance
CityParis
Period7/09/158/09/15

Keywords

  • CMOS
  • Frequency doubler
  • millimeter wave

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Electrical and Electronic Engineering
  • Radiation

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