A 65 nm CMOS Switched-Capacitor Carrier Aggregation Transmitter

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Abstract

This paper presents a new carrier aggregation transmitter architecture with high linearity performance based on series post-PA combining of two switched-capacitor power amplifiers (SCPA), each operating at a different carrier frequency. Linear operation is achieved through the low and digital code word independent output impedance of the SCPA, resulting in low nonlinear interaction between the SCPAs comprising the transmitter. The transmitter operates around the center frequency of 2.4 GHz with a 3 dB bandwidth of 600 MHz and achieves 18.5% peak PAE at a maximum output power of 19 dBm. Carrier to third-order intermodulation distortion product is >40 dBc at 9 dB power backoff within a carrier spacing range larger than 250 MHz. The chip was fabricated in TSMC's 65 nm CMOS, and it occupies an area of 1.6 mm2.

Original languageEnglish
Title of host publicationRFIC 2020 - 2020 IEEE Radio Frequency Integrated Circuits Symposium
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages115-118
Number of pages4
ISBN (Electronic)9781728168098
DOIs
StatePublished - Aug 2020
Event2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020 - Virtual, Los Angeles, United States
Duration: 4 Aug 20206 Aug 2020

Publication series

NameDigest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
Volume2020-August

Conference

Conference2020 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2020
Country/TerritoryUnited States
CityVirtual, Los Angeles
Period4/08/206/08/20

Keywords

  • Carrier aggregation
  • Intermodulation distortion
  • Linearization
  • Switched Capacitors Power Amplifier

All Science Journal Classification (ASJC) codes

  • General Engineering

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