Abstract
This article details the design and characterization of a 6x6 detector array fabricated with 65 nm complementary metal-oxide-semiconductor (CMOS), where the pixels in the array are stitched together with wirebonds as opposed to monolithic integration. Each pixel contains an on-chip loop antenna and baseband chopper amplifier with 32 dB gain. The design focuses on maintaining detector performance under array scaling and baseband integration. Measurement results of the chopper breakout, standalone pixel, and array are presented, where the standalone pixel achieves an RV (voltage responsivity) of 120 kV/W and record noise-equivalent power of 6 pW/√Hz with the baseband amplifier; and the mean array RV is 80 kV/W. The chip pixel area is 950 μm × 600 μm.
| Original language | English GB |
|---|---|
| Pages (from-to) | 583-596 |
| Number of pages | 14 |
| Journal | IEEE Transactions on Terahertz Science and Technology |
| Volume | 16 |
| Issue number | 5 |
| DOIs | |
| State | Published - 1 May 2026 |
Keywords
- Amplifier
- NEP
- antenna
- chopper
- complementary metal-oxide-semiconductor (CMOS)
- detector
- noise
- responsivity
- terahertz
ASJC Scopus subject areas
- Radiation
- Electrical and Electronic Engineering
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