Computer Science
Advanced Encryption Standard
17%
And Gate
12%
Application Specific Integrated Circuit
21%
Clock Cycle
14%
Computer Architecture
16%
Computer Hardware
91%
Cryptographic Algorithm
16%
Cryptographic Device
10%
Cryptography Algorithm
12%
Data Dependency
9%
Design Parameter
11%
Design Technique
9%
Digital Circuit
14%
Efficient Implementation
11%
Electronic Design Automation
14%
Electronic System
14%
Energy Consumption
21%
Energy Dissipation
21%
Energy Performance
9%
Evaluation Methodology
9%
Field Programmable Gate Array
15%
Granularity
28%
Hardware Implementation
12%
Hardware Security
21%
Information Leakage
38%
Integrated Circuit
18%
Lightweight Cryptography
31%
Logic Design
23%
Logic Family
23%
Logic Gate
39%
Lower Energy Consumption
18%
Mutual Information
14%
Noise Margin
18%
Noise-to-Signal Ratio
14%
Performance Improvement
14%
Physical Channel
14%
Physical Security
9%
Power Analysis
14%
Power Consumption
16%
Ripple-Carry Adder
11%
Security Analysis
9%
Security Evaluation
11%
security level
33%
Side Channel
28%
Side Channel Attack
49%
side-channel
100%
Signal Integrity
12%
Supply Voltage
25%
Symmetric Cryptography
12%
Use Case
14%
Engineering
Adders
42%
And Logic Gate
12%
Application Specific Integrated Circuit
12%
Area Overhead
18%
Bias Voltage
9%
Carry Bit
14%
Clock Period
9%
Combinatorial Circuits
9%
Complex Structure
9%
Delay Circuit
9%
Delay Element
9%
Design Flow
18%
Design Process
9%
Design Style
9%
Design Technique
12%
Device Threshold Voltage
9%
Differential Input
9%
Digital Circuits
9%
Electric Power Utilization
28%
Electronic Design Automation
14%
Energy Application
9%
Energy Dissipation
17%
Energy Efficiency
17%
Energy Technology
9%
Fundamental Limit
9%
Granularity
18%
Integrated Circuit
18%
Logic Design
44%
Logic Gate
52%
Main Parameter
9%
Measurement Data
9%
Metrics
18%
Microprocessor Chips
9%
Mode Dynamic
71%
Mutual Information
14%
Noise Analysis
9%
Operating Characteristic
9%
Performance Improvement
17%
Processed Data
18%
Random Number
9%
Robust Design
10%
Side Channel
36%
Side Channel Attack
39%
Signal-to-Noise Ratio
11%
Silicon on Insulator
28%
Silicon on Insulator Technology
23%
Simulation Result
21%
Supply Voltage
14%
Time Domain
9%
Transients
9%
Keyphrases
8T SRAM Cell
9%
Adversary
10%
Algorithmic Noise
9%
Alternative Logic Family
9%
Area Overhead
12%
Attacker
18%
Circuit Level
11%
Clock Period
14%
Critical Path Prediction
9%
Cryptographic Devices
12%
Cryptographic Functions
9%
Data Delay
18%
Data Dependency
18%
Design Metrics
9%
Digital Signal
9%
Dual Mode Logic
46%
Dual-rail
14%
Energy Consumption
10%
Energy-delay Optimization
12%
Energy-delay Tradeoff
18%
Energy-related Operations
10%
FDSOI Technology
11%
Gate Level
34%
Hardware Security
28%
High Performance
9%
Information Leakage
21%
Integrated Electronic System
9%
Library Design
9%
Low Voltage
18%
Low-voltage Application
9%
Masked Implementation
9%
Multiplier-accumulator
18%
Optimistic Design
9%
Optimization Methodology
9%
Physical Channel
14%
Physical Noise
9%
Power Analysis Attack
18%
Power Traces
9%
Process Data
12%
Process Variation
14%
Reduction Method
9%
Self-adjusting Systems
9%
Side Channel
14%
Side Channel Analysis Attacks
14%
Side-channel Analysis
12%
Side-channel Attacks
27%
Standard Flow
9%
Static Noise Margin
9%
Temporal Power
9%
UTBB FD-SOI
23%
